YASUHIKO TAKENAGA
| Department of Computer and Network Engineering | Associate Professor |
| Cluster I (Informatics and Computer Engineering) | Associate Professor |
- Profile:
working on the theory of algorithms, computational complexity and properties of Boolean functions
Researcher Information
Research Keyword
Educational Background
Research Activity Information
Paper
- On the Power of Lookahead in Single-Player PuyoPuyo
Y.Takenaga; S.Kikuchi; H.Quan
ICGA Journal, 43, 2, 102-113, 2021, Peer-reviwed
Scientific journal, English - QUIXO is EXPTIME-complete
Shohei Mishiba; Yasuhiko Takenaga
Information Processing Letters, Elsevier, 162, 105995, Oct. 2020, Peer-reviwed
Scientific journal, English - Matchstick Puzzles on a Grid
Y.Takenaga; S.Mishiba an; H.Sugiyama
Graphs and Combinatorics, Springer, 36, 2, 347-357, Mar. 2020, Peer-reviwed
Scientific journal, English - Anti-Slide Placements of Pentominoes
Y.Takenaga; X.Yang; A.Inada
The Japan Conference on Discrete and Computational Geometry, Graphs, and Games (JCDCG^3) 2019, 121-122, 07 Sep. 2019, Peer-reviwed
International conference proceedings, English - Matchstick Puzzles on a Grid
Yasuhiko Takenaga; Shohei Mishiba; Haruka Sugiyama
Proc. the 20th Japan Conference on Discrete and Computational Geometry, Graphs, and Games, 137-138, Aug. 2017, Peer-reviwed
International conference proceedings, English - Strategies for Single-Player PuyoPuyo
Yasuhiko Takenaga; Yo Shimada
ICGA JOURNAL, IOS PRESS, 39, 2, 87-101, 2017, Peer-reviwed, PuyoPuyo is a Tetris type game which is played worldwide. In this paper, we consider if the player has a winning strategy for single-player PuyoPuyo under various conditions. We regard that the player has a winning strategy if and only if he can keep playing the game forever within a gameboard of a constant height. The difficulty of the game changes according to the number of colors used for game pieces and the width of the gameboard. We first show that k(k-1)/2 + 1 is the sufficient width for the player to have a winning strategy on PuyoPuyo with k colors. Next we show that 3w - 4 (w >= 3) colors are sufficient to make the player lose on the gameboard of width w. Finally, we show that the player can make puyos disappear at least once on PuyoPuyo with three colors and width two.
Scientific journal, English - Number of Three-Point Tilings with Triangle Tiles
Yasuhiko Takenaga; Narutoshi Tanaka; Takahiro Habara
Journal of Information Processing, Information Processing Society of Japan, 23, 3, 305-309, 2015, Peer-reviwed, Three-point tiling is the problem to cover all the lattice points in a triangular region of the triangular lattice with triangle tiles that connect three adjacent lattice points. All the lattice points must be used by exactly one triangle tile. In this paper, we enumerate all the solutions and rotation symmetric solutions using ordered binary decision diagrams. In addition, the number of essentially different solutions, any two of which do not become identical by rotating and turning over, is computed.
Scientific journal, English - Satogaeri, Hebi and Suraromu are NP-Complete
Shohei Kanehiro; Yasuhiko Takenaga
3RD INTERNATIONAL CONFERENCE ON APPLIED COMPUTING AND INFORMATION TECHNOLOGY (ACIT 2015) 2ND INTERNATIONAL CONFERENCE ON COMPUTATIONAL SCIENCE AND INTELLIGENCE (CSI 2015), IEEE, 46-51, 2015, Peer-reviwed, Pencil puzzles are the puzzles such that people write answers on problems printed on paper. In this paper, we deal with three pencil puzzles, Satogaeri, Hebi and Suraromu. We show that the problems to decide the solvability of these puzzles are NP-complete. Also, in all of these puzzles, we show that there exist the rules without which the puzzles remain NP-complete.
International conference proceedings, English - Shikaku and Ripple Effect are NP-Complete
Y.Takenaga; S.Aoyagi; S.Iwata; T.Kasai
Congressus Numerantium, Utilitas Mathematica Publishing Inc., 216, 119-127, Dec. 2013, Peer-reviwed
Scientific journal, English - NP-completeness of pandemic
Kenichiro Nakai; Yasuhiko Takenaga
Journal of Information Processing, 20, 3, 723-726, 2012, Peer-reviwed, Pandemic is a multi-player board game which simulates the outbreak of epidemics and the human effort to prevent them. It is a characteristic of this game that all the players cooperate for a goal and they are not competitive. We show that the problem to decide if the player can win the generalized Pandemic from the given situation of the game is NP-complete. © 2012 Information Processing Society of Japan.
Scientific journal, English - Precoloring Extension on Grid Graphs
Yasuhiko Takenaga
Proc. the China-Japan Joint Confernece on Computational Geometry, Graphs and Applications (CGGA 2010), 102-103, Oct. 2010, Peer-reviwed
International conference proceedings, English - STONEHENGE: OUTCOME OF ALL FIRST MOVES AND PSPACE-COMPLETENESS
Yasuhiko Takenaga; Hikari Mori; Shigeki Iwata
ICGA JOURNAL, UNIV MAASTRICHT FACULTY GENERAL SCIENCES, 33, 1, 34-41, Mar. 2010, Peer-reviwed, Stonehenge is a two-player game in which players alternately place a piece on an intersection of the lines drawn on the game board. The player who dominates more than half of the lines wins the game. In this note, we first present the result of exhaustive computations of Stonehenge: for all first moves, the winner of the game is computed, and the results show that the first player has a winning strategy. Second, we consider Generalized Stonehenge played on a hypergraph and prove its PSPACE-completeness.
Scientific journal, English - PSPACE-completeness of an escape problem
Yasuhiko Takenaga; Shigeru Arai
INFORMATION PROCESSING LETTERS, ELSEVIER SCIENCE BV, 108, 4, 229-233, Oct. 2008, Peer-reviwed
Scientific journal, English - Tree-shellability of restricted DNFs
Yasuhiko Takenaga; Nao Katougi
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG, E91D, 4, 996-1002, Apr. 2008, Peer-reviwed, A tree-shellable function is a positive Boolean function which can be represented by a binary decision tree whose number of paths from the root to a leaf labeled 1 equals the number of prime implicants. In this paper, we consider the tree-shellability of DNFs with restrictions. We show that, for read-k DNFs, the number of terms in a tree-shellable function is at most k(2). We also show that, for k-DNFs, recognition of ordered tree-shellable functions is NP-complete for k = 4 and tree-shellable functions can be recognized in polynomial time for constant k.
Scientific journal, English - Vertex Coloring of Chordal+k_1e-k_2e Graphs
Y.Takenaga; Y.Miura
IWOCA2007, to appear, Nov. 2007, Peer-reviwed
International conference proceedings, English - TETRAVEX is NP-complete
Yasuhiko Takenaga; Toby Walsh
INFORMATION PROCESSING LETTERS, ELSEVIER SCIENCE BV, 99, 5, 171-174, Sep. 2006, Peer-reviwed
Scientific journal, English - NP-Completeness of Maximum Chain Problem on Puyopuyo
T. Matsukane; Y. Takenaga
The IEICE Transactions on Information and Systems, The Institute of Electronics, Information and Communication Engineers, J89-D, 3, 405-413, Mar. 2006, Peer-reviwed
Scientific journal, Japanese - Vertex coloring of comparability +ke and -ke graphs
Yasuhiko Takenaga; Kenichi Higashide
GRAPH-THEORETIC CONCEPTS IN COMPUTER SCIENCE, SPRINGER-VERLAG BERLIN, 4271, 102-+, 2006, F + ke and T - ke graphs are classes of graphs close to graphs in a graph class T. They are the classes of graphs obtained by adding or deleting at most k edges from a graph in T. In this paper, we consider vertex coloring of comparability+ke and comparability-ke graphs. We show that for comparability+ke graphs, vertex coloring is solved in polynomial time for k = 1 and NP-complete for k >= 2. We also show that vertex coloring of comparability-1e graphs is solved in polynomial time.
International conference proceedings, English - Tree-shellability of Boolean functions
Y Takenaga; K Nakajima; S Yajima
THEORETICAL COMPUTER SCIENCE, ELSEVIER SCIENCE BV, 262, 1-2, 633-647, Jul. 2001, Peer-reviwed, In this paper, we define tree-shellable and ordered tree-shellable Boolean functions. A tree-shellable function is a positive Boolean function such that the number of prime implicants equals the number of paths from the root node to a I-node in its binary decision tree representation. A tree-shellable function is easy to dualize and good for a kind of reliability computation. We show their basic properties and clarify the relations between several shellable functions, i.e. shellable, tree-shellable, ordered tree-shellable, aligned and lexico-exchange functions. We also discuss on tree-shellable quadratic functions. (C) 2001 Elsevier Science B.V. All rights reserved.
Scientific journal, English - Recognition of ordered tree-shellable Boolean functions based on OBDDs
Y Takenaga
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG, E84D, 1, 28-33, Jan. 2001, Peer-reviwed, In this paper, we consider the complexity of recognizing ordered tree-shellable Boolean functions when Boolean functions are given as OBDDs. An ordered tree-shellable Function is a positive Boolean function such that the number of prime implicants equals the number of paths from the root node to a 1-node in its ordered binary decision tree representation. We show that given an OBDD, it is: possible to check within polynomial time if the function is ordered tree-shellable with respect to the variable ordering of the OBDD.
Scientific journal, English - Hardness of identifying the minimum ordered binary decision diagram
Y Takenaga; S Yajima
DISCRETE APPLIED MATHEMATICS, ELSEVIER SCIENCE BV, 107, 1-3, 191-201, Dec. 2000, Peer-reviwed, An ordered binary decision diagram (OBDD) is a graph representation of a Boolean function. We consider minimum OBDD identification problems: given positive and negative examples of a Boolean function, identify the OBDD with minimum number of nodes (or with minimum width) that is consistent with all the examples. We prove in this paper that the problems are NP-complete. The result implies that f(n)-width OBDD and f(n)-node OBDD are not learnable for some fixed f(n) under the PAC-learning model unless NP = RP. We also show that the problems are still NP-hard even if we restrict the functions to monotone functions. (C) 2000 Elsevier Science B.V. All rights reserved.
Scientific journal, English - Size of ordered binary decision diagrams representing threshold functions(共著)
K.Hosaka; Y.Takenaga; T.Kaneda; S.Yajima
Theoretical Computer Science, 180, 1-2, 47-60, Jul. 1997, Peer-reviwed
Scientific journal, English - Computational power of nondeterministic ordered binary decision diagrams and their subclasses
K Takagi; K Nitta; H Bouno; Y Takenaga; S Yajima
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG, E80A, 4, 663-669, Apr. 1997, Peer-reviwed, Ordered Binary Decision Diagrams (OBDDs) are graph-based representations of Boolean functions which are widely used because of their good properties. In this paper, we introduce nondeterministic OBDDs (NOBDDs) and their restricted forms, and evaluate their expressive power. In some applications of OBDDs, canonicity, which is one of the good properties of OBDDs, is not necessary. In such cases, we can reduce the required amount of storage by using OBDDs in some non-canonical form. A class of NOBDDs can be used as a non-canonical form of OBDDs. In this paper, we focus on two particular methods which can be regarded as using restricted forms of NOBDDs. Our aim is to show how the size of OBDDs can be reduced in such forms from theoretical point of view. Firstly, we consider a method to solve satisfiability problem of combinational circuits using the structure of circuits as a key to reduce the NOBDD size. We show that the NOBDD size is related to the cutwidth of circuits. Secondly, we analyze methods that use OBDDs to represent Boolean functions as sets of product terms. We show that the class of functions treated feasibly in this representation strictly contains that in OBDDs and contained by that in NOBDDs.
Scientific journal, English - Size and Variable Ordering of OBDDs Representing Threshold Functions(共著)
Y.Takenaga; M.Nouzoe; S.Yajima
COCOON'97, 91-100, 1997, Peer-reviwed
International conference proceedings, English - On the Size of Ordered Binary Decision Diagrams Representing Threshold Functions(共著)
K.Hosaka; Y.Takenaga; S.Yajima
ISAAC'94, 834, 584-592, Aug. 1994, Peer-reviwed
International conference proceedings, English - ON THE COMPUTATIONAL POWER OF BINARY DECISION DIAGRAMS
H SAWADA; Y TAKENAGA; S YAJIMA
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG, E77D, 6, 611-618, Jun. 1994, Peer-reviwed, Binary decision diagrams (BDD's) are graph representations of Boolean functions, and at the same time they can be regarded as a computational model. In this paper, we discuss relations between BDD's and other computational models and clarify the computational power of BDD's. BDD's have the property that each variable is examined only once according to a total order of the variables. We characterize families, of BDD's by on-line deterministic Turing machines and families of permutations. To clarify the computational power of BDD's, we discuss the difference of the computational power with respect to the way of reading inputs. We also show that the language TADGAP (Topologically Arranged Deterministic Graph Accessibility Problem) is simultaneously complete for both of the class U-PolyBDD of languages accepted by uniform families of polynomial-size BDD's and the-DL of languages accepted by log-space bounded deterministic Turing machines. From the results, we can see that the problem whether U-PolyBDD subset-or-equal-to U-NC1 is equivalent to a famous open problem whether DL subset-or-equal-to U-NC1, where U-NC1 is the class of languages accepted by uniform families of log-depth constant fan-in logic circuits.
Scientific journal, English - COMPUTATIONAL-COMPLEXITY OF MANIPULATING BINARY DECISION DIAGRAMS
Y TAKENAGA; S YAJIMA
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, IEICE-INST ELECTRON INFO COMMUN ENG, E77D, 6, 642-647, Jun. 1994, Peer-reviwed, An Ordered Binary Decision Diagram (BDD) is a graph representation of a Boolean function. According to its good properties, BDD's are widely used in various applications. In this paper, we investigate the computational complexity of basic operations on BDD's. We consider two important operations: reduction of a BDD and binary Boolean operations based on BDD's. This paper shows that both the reduction of a BDD and the binary Boolean operations based on BDD's are NC1-reducible to REACHABILITY. That is, both of the problems belong to NC2. In order to extend the results to the BDD's with output inverters, we also considered the transformations between BDD's and BDD's with output inverters. We show that both of the transformations are also NC1-reducible to REACHABILITY.
Scientific journal, English - Computational Power of a Memory-Based Parallel Computation Model with Content Addressable Memory
Y.Takenaga; N.Takagi; S.Yajima
Trans. IPSJ, Information Processing Society of Japan (IPSJ), 33, 4, 415-422, Apr. 1992, Peer-reviwed
Scientific journal, Japanese - COMPUTATIONAL POWER OF MEMORY-BASED PARALLEL COMPUTATION MODELS WITH COMMUNICATION
Y TAKENAGA; S YAJIMA
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, IEICE-INST ELECTRON INFO COMMUN ENG, E75D, 1, 89-94, Jan. 1992, Peer-reviwed, By adding some functions to memories, highly parallel computation may be realized. We have proposed memory-based parallel computation models, which uses a new functional memory as a SIMD type parallel computation engine. In this paper, we consider models with communication between the words of the functional memory. The memory-based parallel computation model consists of a random access machine and a functional memory. On the functional memory, it is possible to access multiple words in parallel according to the partial match with their memory addresses. The cube-FRAM model, which we propose in this paper, has a hypercube network on the functional memory. We prove that PSPACE is accelerated to polynomial time on the model. We think that the operations on each word of the functional memory are, in a sense, the essential ones for SIMD type parallel computation to realize the computational power.
Scientific journal, English - A Memory-Type Parallel Computation Model and Its Computational Power
N.Takagi; Y.Takenaga; S.Yajima
Trans. IPSJ, 31, 11, 1565-1571, Nov. 1990, Peer-reviwed
Scientific journal, Japanese
Books and other publications
Lectures, oral presentations, etc.
- ヤバラスのPSPACE完全性
武藤里樹; 武永康彦
Japanese, 情報処理学会第87回全国大会
14 Mar. 2025
13 Mar. 2025- 15 Mar. 2025 - 色数1の一般化ぷよぷよの連鎖数判定問題
水越開理; 武永康彦
Oral presentation, Japanese, 情報処理学会第87回全国大会
14 Mar. 2025
13 Mar. 2025- 15 Mar. 2025 - 一人用ダイヤモンドゲームにおける最小手数について
豊永桂輔; 武永康彦
Poster presentation, Japanese, 2024年電子情報通信学会総合大会
07 Mar. 2024
04 Mar. 2024- 08 Mar. 2024 - 様々なグラフ上での「うさぎと猟犬」の必勝性について
橋本悠希; 武永康彦
Poster presentation, Japanese, 2024年電子情報通信学会総合大会
07 Mar. 2024
04 Mar. 2024- 08 Mar. 2024 - Approximate Block Diagonalization of Symmetric Matrices Using Quantum Annealing
Koushi Teramoto; Masaki Kugaya; Shuhei Kudo; Yasuhiko Takenaga; Yusaku Yamamoto
Oral presentation, English, The International Conference on High Performance Computing in Asia-Pacific Region (HPC Asia 2024), Peer-reviewed
16 Jan. 2024
15 Jan. 2024- 17 Jan. 2024 - 泥棒の速度が異なるCops and Robbersの格子上における戦略
小森良汰朗、武永康彦
Poster presentation, Japanese, 2023年電子情報通信学会総合大会
07 Mar. 2023
07 Mar. 2023- 10 Mar. 2023 - Finding a Shortest Solution for Single-Player Chinese Checkers is NP-complete
Yuya Nakamura; Yasuhiko Takenaga
Oral presentation, English, 2022年電子情報通信学会総合大会
17 Mar. 2022
15 Mar. 2022- 18 Mar. 2022 - 三人一般化七並べの必勝性
田中天希; 武永康彦
Poster presentation, Japanese, 2022年電子情報通信学会総合大会
15 Mar. 2022
15 Mar. 2022- 18 Mar. 2022 - ペントミノを用いたアンチスライドパズルの解の列挙
宇賀神慶行; 武永康彦
Poster presentation, Japanese, 2022年電子情報通信学会総合大会
15 Mar. 2022
15 Mar. 2022- 18 Mar. 2022 - グラフ上のダイヤモンドゲームの計算複雑さ
山田貴之; 武永康彦
Poster presentation, Japanese, 2022年電子情報通信学会総合大会
15 Mar. 2022
15 Mar. 2022- 18 Mar. 2022 - NP-completeness of peg solitaire on graphs
Kazushi Ito; Yasuhiko Takenaga
Oral presentation, English, The 23rd Thailand-Japan Conference on Discrete and Computational Geometry, Graphs, and Games (TJCDCG3 2020+1), Peer-reviewed, International conference
04 Sep. 2021
03 Sep. 2021- 05 Sep. 2021 - 二人一般化七並べの戦略
田中天希; 武永康彦
Poster presentation, Japanese, 電子情報通信学会2020年総合大会, Domestic conference
17 Mar. 2020
17 Mar. 2020- 20 Mar. 2020 - グラフ上のペグソリティアの計算困難性
伊藤和司; 武永康彦
Poster presentation, Japanese, 電子情報通信学会2020年総合大会, Domestic conference
17 Mar. 2020
17 Mar. 2020- 20 Mar. 2020 - 先読みを考慮した一人ぷよぷよの必勝性
菊地翔; 武永康彦
Oral presentation, Japanese, 第82回情報処理学会全国大会, Domestic conference
05 Mar. 2020 - Anti-Slide Placements of Pentominoes
Yasuhiko Takenaga; Xi Yang; Asuka Inada
Oral presentation, English, The 22nd Japan Conference on Discrete and Computational Geometry, Graphs, and Games (JCDCG^3 2019), International conference
07 Sep. 2019 - 幅３色数３の一人ぷよぷよの必勝性
菊地翔; 武永康彦
Poster presentation, Japanese, 電子情報通信学会総合大会, Domestic conference
19 Mar. 2019 - 格子上での Cops and Robbers の方向のみ認知可能なルール
大久保辰哉; 武永康彦
Poster presentation, Japanese, 電子情報通信学会総合大会, Domestic conference
19 Mar. 2019 - ペントミノを用いたアンチスライドパズルの解の列挙
楊璽; 武永康彦; 稲田明透河
Oral presentation, Japanese, 第８１回情報処理学会全国大会, Domestic conference
15 Mar. 2019 - On Winning Strategies for Tetris Type Games
Yasuhiko Takenaga; Masaki Katsuno; Hushan Quan
Oral presentation, English, The 20th Korea-Japan Joint Workshop on Algorithms and Computation, Seoul, Korea, International conference
25 Aug. 2017 - 先読みありの1人ぷよぷよの必勝性
全虎山; 武永康彦
Poster presentation, Japanese, 電子情報通信学会総合大会, Domestic conference
22 Mar. 2017 - 一般化QUIXOの計算複雑さ
三柴翔平; 武永康彦
Poster presentation, Japanese, 電子情報通信学会総合大会, Domestic conference
22 Mar. 2017 - 一人用落ち物パズルゲームの必勝性
勝野誠基; 武永康彦
Poster presentation, Japanese, 電子情報通信学会総合大会, Domestic conference
22 Mar. 2017 - グラフ上の一般化ペグソリティア
山本和明; 武永康彦
Poster presentation, Japanese, 電子情報通信学会総合大会, Domestic conference
22 Mar. 2017 - 格子上のマッチ棒パズル
三柴翔平; 武永康彦; 杉山晴香
Oral presentation, Japanese, 組合せゲーム・パズルプロジェクト第12回研究集会, Domestic conference
06 Mar. 2017 - 木+keグラフの部分グラフ同型判定アルゴリズム
上野 豊; 武永康彦
Poster presentation, Japanese, 電子情報通信学会2014年総合大会
19 Mar. 2014 - フロンティア法を用いた根無し木の列挙
吉田隆史; 武永康彦
Poster presentation, Japanese, 電子情報通信学会2014年総合大会, Domestic conference
19 Mar. 2014 - 色数と盤面の幅を限定したぷよぷよの必勝性
島田陽; 武永康彦
Oral presentation, Japanese, 組合せゲーム・パズル第9回ミニ研究集会
28 Feb. 2014 - 比較可能-keグラフの頂点彩色問題のパラメータ化計算量（共著）
斎藤惇; 武永康彦
Oral presentation, Japanese, 電子情報通信学会技術研究報告
Mar. 2012 - パラメータ化permutationグラフの頂点彩色問題
小寺諒; 武永康彦
Oral presentation, Japanese, 2012年電子情報通信学会総合大会
Mar. 2012 - 木+keグラフの同型性判定問題
上野豊; 武永康彦
Oral presentation, Japanese, 2012年電子情報通信学会総合大会
Mar. 2012 - パラメータ化グラフに対するFixed-Parameterアルゴリズムの設計手法
岩永耕平; 武永康彦
Oral presentation, Japanese, 2010年電子情報通信学会総合大会
Mar. 2010 - ナンバーリンクのＮＰ完全性と問題の列挙
古妻浩一; 武永康彦
Oral presentation, Japanese, 電子情報通信学会,コンピュテーション研究会
Mar. 2010 - 多変量閾値関数の非明示的OBDD表現
中山昌光; 武永康彦
Oral presentation, Japanese, 電子情報通信学会技術研究報告,コンピュテーション研究会
Mar. 2008 - OBDDを用いた画像処理アルゴリズム
番能孝生; 武永康彦
Oral presentation, Japanese, 2008年電子情報通信学会総合大会
Mar. 2008 - Chordal+k_1e-k_2eグラフの頂点彩色問題
三浦勇介; 武永康彦
Oral presentation, Japanese, 電子情報通信学会技術研究報告,コンピュテーション研究会
Mar. 2007 - Recognition of Tree-Shellable Boolean Functions with Several Restrictions
N. Katougi; Y. Takenaga; T. Ishibashi
Oral presentation, Japanese, 電子情報通信学会技術研究報告,コンピュテーション研究会
Mar. 2006 - Coloring Comparability-ke Graphs
Y. Takenaga
Oral presentation, English, LAシンポジウム
Feb. 2006 - リテラルの出現回数に制限を加えたTree-Shellable論理関数の判定複雑さ
加藤木直; 武永康彦
Oral presentation, Japanese, 電子情報通信学会技術研究報告
May 2005 - 区間グラフのOBDD表現について
松川弘明; 武永康彦
Oral presentation, Japanese, 2005年電子情報通信学会総合大会,2005年電子情報通信学会総合大会
Mar. 2005 - ブロック化分岐プログラムにおける変数順序と表現能力の関係
小関一弘; 武永康彦
Oral presentation, Japanese, 情報処理学会研究報告
Mar. 2004 - 変数の出現回数が制限されたBranching Programの表現能力(共著)
河村亨; 武永康彦
Oral presentation, Japanese, LAシンポジウム
Jan. 2002 - Complexity of Recognizing Tree-Shellable Functions
Y.Takenaga
Oral presentation, Japanese, 電子情報通信学会技術報告
Nov. 2001 - Recognition of Tree-Shellable Boolean Functions
Y. Takenaga
Oral presentation, English, LAシンポジウム
Jul. 2001 - Tree-Shellable論理関数の判定の複雑さ(共著)
門野伸史; 武永康彦
Oral presentation, Japanese, LAシンポジウム
Jan. 2001 - 幅に制限を加えたOBDDの等価性判定(共著)
市村昌一; 武永康彦
Oral presentation, Japanese, 電子情報通信学会技術研究報告
Nov. 2000 - Checking ordered tree-shellability of boolean function based on OBDDs
Y. Takenaga
Oral presentation, English, 電子情報通信学会技術研究報告
Oct. 1999
Research Themes
- パラメータや盤面を変更したゲームの必勝戦略と計算複雑さ
武永康彦
日本学術振興会, 科学研究費助成事業 基盤研究(C), 電気通信大学, 基盤研究(C), Principal investigator, 23K11380
Apr. 2023 - Mar. 2027 - 組合せ的前処理と量子アニーリングの融合による行列計算の加速手法
山本 有作; 武永 康彦
日本学術振興会, 科学研究費助成事業 挑戦的研究(萌芽), 電気通信大学, 挑戦的研究(萌芽), Coinvestigator, 22K19772
Jun. 2022 - Mar. 2025 - Strategies of games on graphs and games with onlineness
Takenaga Yasuhiko
Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (C), The University of Electro-Communications, Grant-in-Aid for Scientific Research (C), Principal investigator, On games with onlineness, we have mainly dealt with PuyoPuyo, which is a kind of Tetris-like games. We have studied on the affect of lookahead of input pieces to the winning strategy of single-player PuyoPuyo. As a main result, we have shown that the player loses on the game board of width two or three if the number of colors used for input pieces is large, how large the number of lookaheads is. On games on graphs, we have mainly studied on peg moving games like peg solitaire and Chinese checkers on graphs. We have proved hardness results on several problems on the games including solvabiliy of graphs on peg solitaire and deciding the winner on Chinese checkers. We have also studied on the new variation of the rules on peg moving games., 18K11601
Apr. 2018 - Mar. 2022 - Online problems and complexity in games and puzzles
Takenaga Yasuhiko
Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (C), The University of Electro-Communications, Grant-in-Aid for Scientific Research (C), Principal investigator, In this research, we deal with a falling block puzzle game PuyoPuyo, which has online property, as a single-player game and consider the conditions so that the player can win, that is, the player can keep playing the game forever on the gameboard of a constant height. We have considered both the cases that the lookahead of inputs exists as in the real game and it does not exist. In both cases, we have shown sufficient conditions that the player wins and that the player loses using the number of game pieces, the width of the gameboard and the number of lookaheads as parameters. Also we have shown that the ideas of the proofs can be applied to the other similar games. Also, we have shown algorithms and complexity of the problems to decide if the matchstick puzzles on the grid has a solution and the problem to decide the winner of a tow-player game QUIXO., 15K00505
Oct. 2015 - Mar. 2018 - Game informatics: Search of And-Or tree and Computational Complexity of games and puzzles
IWATA Shigeki; TAKENAGA Yasuhoko; KASAI Takumi; ITO Hiroo
Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (C), The University of Electro-Communications, Grant-in-Aid for Scientific Research (C), This research is concerned with Game Informatics. The themes are (1) computer search of And-Or trees, and (2) computational complexity of games and puzzles. Search of And-Or tree (game-tree) by computers generally use evaluation function. We define our game-tree model, and compare numbers of configurations to be searched by depth-first search at the designated depth of our game-tree under various evaluation functions. Our result shows that the number of configurations when an evaluation function is applied, which is as close as the perfect evaluation function with probability p (0 - Research on parameterized graph algorithms
TAKENAGA Yasuhiko
Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (C), The University of Electro-Communications, Grant-in-Aid for Scientific Research (C), We have developed fixed-parameter algorithms or proved the hardness of vertex coloring problems on parameterized graphs obtained by adding or deleting edges from graphs in classes such as comparability graphs, permutation graphs and grid graphs. We have also developed a fixed-parameter algorithm for isomorphism of tree+ ke graphs. In addition, we have clarified the property of problems and parameterized graph classes which makes it possible to design fixed-parameter algorithms., 21500007
2009 - 2011 - 論理関数表現のモデルとシンボリックアルゴリズム
武永 康彦; 湊 真一
日本学術振興会, 科学研究費助成事業 特定領域研究, 電気通信大学, 特定領域研究, 1.二分決定グラフによるデータ表現については、第一に、二分決定グラフの構造を論理関数で表現する二分決定グラフの非明示的表現を用いて、効率的な表現が可能な論理関数について研究を行ない、多変量閾値関数を入力変数のビット長に依存しないサイズで表現できることを示した。 第二に、A07班山下との共同研究により、量子論理関数を効率よく表現するためのOBDDの変種データ構造を比較検討し、山下が以前に提案したDecisionDiagrams for Matrix Functions(DDMFs)の有効性を理論的に考察した。このデータ構造が、量子論理回路に特有の制約条件をうまく利用しており、単純なOBDDよりも一層データを圧縮し、処理効率を高めていることを明らかにした。 2.OBDDに基づくシンボリックアルゴリズムについては、前年度に引き続き、トポロジカルソートの列挙、OBDDによる画像処理アルゴリズムについて研究を行なった。前者では先行頂点数等を求めることにより従来法より計算過程でのOBDDサイズを大幅に抑えられることを示した。後者ではOBDD予測符号化を用いることによりOBDDサイズが圧縮可能であり、提案済みの画像処理アルゴリズムをほぼそのまま利用できることを示した。また、OBDDを用いたナンバーリンクの解法、問題の正当性の判定手法の提案・実装を行なった。, 16092207
2004 - 2007 - The application of Formal Language Theory to Natural Language Processing
KASAI Takumi; HASUNUMA Toru; TAKENAGA Yasuhiko; IWATA Shigeki
Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (C), The University of Electro-Communications, Grant-in-Aid for Scientific Research (C), We introduced a restricted model of context-free tree grammars called spine grammars, and studied their formal properties including considerably simple normal forms. Recent research on natural languages has suggested that formalisms for natural languages need to generate a slightly larger class of languages than context-free grammars, and for that reason tree adjoining grammars have been widely studied relating them to natural languages. It was shown that the class of string languages generated by spine grammars coincides with that of tree adjoining grammars. We also introduced acceptors called linear pushdown tree automatas are obtained from pushdown tree automata with restriction on duplicability for the pushdown stacks. We also investigated learning theory and obtained a polynomial time inference algorithm for Moore type sequential machines. Further we also investigated the automata models for tree adjoining grammars and introduced a model called transfer pushdown automata., 10680341
1998 - 2001 - Lower Bounds in Computer Science
IWATA Shigeki; HASUNUMA Toru; TAKENAGA Yasuhiko; KASAI Takumi
Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (C), The University of Electro-Communications, Grant-in-Aid for Scientific Research (C), We focus our attention on finding lower bounds of the number M(m,n) of comparators in (m,n)-merging networks. M(n,n), (n < 5,n = 7,8,9) and 16 < oM(6,6) < 17 are already known. We proved that M(6,6) = 17. (The paper is published.) We derived a lower bound theorem concerning M(m,n), and showed that infinite-many Batcher's odd-even merge are optimal. By the theorem, we solved an open problem posed by Yao and Yao, which has been open for a quarter century. (The paper is published.) Consider Tsume-Shogi on n x n Shogi-board. We proved that the problem to determine whether the attack-side player (the first player) can give checkmate the game is EXPTIME complete. (The paper is published.) For a directed acyclic graph G with n nodes, T(G) is defined to be the number of the ways to assign integers 1,2, …, n to the nodes of G so that the number on node u is less than the one on v for an edge (u,v) in G. According to the definition, T(G] can be computed in O(n^2・n^!) steps. We presented an algorithm to compute T(G) in O(n^2 2^n) steps. (The paper is published in IEICE Technical Report.) As far as other researchers are concerned, Dr. Kasai showed a polynomial time inference algorithm, and a result in formal language. Dr. Takenaga gave some properties on ordered binary decision diagrams, and on tree-shellable boolean functions. Dr. Hasunuma showed properties on graph theory, and gave some graph algorithms. These results are considered as basic studies for our research project, and we will further develop these theories in our future research., 10680342
1998 - 2001 - 論理関数のグラフ表現の性質と双対比への応用
武永 康彦
日本学術振興会, 科学研究費助成事業 奨励研究(A), 電気通信大学, 奨励研究(A), 本研究では、二分決定木や分岐プログラムなど理論上実際上重要な、グラフによる論理関数の表現法について、研究を行なってきた。本年度の研究成果の詳細は以下の通りである。 1. 分岐プログラムの性質と表現能力に関する研究 分岐プログラムの一種で、効率的な論理関数の表現法として知られる二分決定グラフについて、論理関数の正の例および負の例からの学習可能性について研究を行なった。具体的には、すべての例を満たす最小サイズの二分決定グラフを求める問題が、関数をしきい値関数に制限した場合でもNP困難であることを示した。 2. 論理関数双対化等への応用 前年度に提案した、論理関数を二分木表現の1つの経路が1つの素項に対応するような正論理関数のクラスについて、決定木の変数順序を固定した場合(ordered tree-shellable関数)、固定しない場合(tree-shellable関数)にわけて、さらに研究を進めた。 (Ordered)tree-shellableであることがわかれば、効率良い双対化等、その特長の活用が可能だが、それにはこれらのクラスに属するかどうかの判定が必要となる。Quadratic関数(積和形表現の各積項のリテラル数が2個)に対しては多項式時間で判定可能であるが、一般の場合についても、リテラル数が2個の積項だけを取り出した関数が(ordered)tree-shellableであることが、必要条件となることを示した。また、前年度のプログラムを改良し、変数の置換によって等価となる関数を1個とみなした場合も含め、6変数までの関数に対して、これらの性質を持つ関数の個数を具体的に求めた。, 09780267
1997 - 1998 - Research on Development of Formal Logic Design Verifier for Microprocessors
YAJIMA Shuzo; OGINO Hiroyuki; TAKENAGA Yasuhiko; HAMAGUCHI Kiyoharu
Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (A), KYOTO UNIVERSITY, Grant-in-Aid for Scientific Research (A), The aim of this research is to develop a formal verifier for large sequential circuits, in particular, microprocessors. Although arithmetic circuits such as multipliers are crucial components in microprocessor designs, it was a hard problem to verify them. We developed a new algorithm using binary moment diagrams, and showed that it is possible to verify multipliers, which were typical hard problems in formal verification. Furthermore, we developed a new efficient algorithm for formal verification based on linear time temporal logic, which can describe temporal properties more easily than the other temporal logics. In order to deal with circuits at function level than at logic level, we took a logic known as quantifier-free first-order predicate logic with equality. We introduced temporal operators similar to those of the above linear time temporal logic, and proved that its validity checking problem is decidable. We improved this algorithm in terms of required time and space, and implemented the algorithm to show its effectiveness. Furthermore we showed that the optimal variable ordering problem of binary decision diagrams is NP-complete. We also investigated the computational power of a variant binary decision diagrams which have nondeterministic nodes., 07558155
1995 - 1996 - Basic Research on High-Speed Boolean Function Manipulator
YAJIMA Shuzo; YASUOKA Kouichi; OGINO Hiroyuki; TAKENAGA Yasuhiko; HAMAGUCHI Kiyoharu; TAKAGI Naofumi
Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for General Scientific Research (B), KYOTO UNIVERSITY, Grant-in-Aid for General Scientific Research (B), We have carried out basic research on high-speed manipulation of Boolean functions based on binary decision diagrams. 1.Algorithms and Complexity of Manipulating Binary Decision Diagrams We have propsed highly parallel algorithms for reduction and Booleam operations, which are basic Boolean function manipulation based on binary decision diagrams (BDDs), and clarified their computational complexity. On the expressive power of BDDs, we have defined the class of Boolean functions expressible by polynomial size BDDs and compared it with the classes based on Turing machines. We have also studied on the size of BDDs representing threshold functions. 2.High-Speed Boolean Function Manipulator We have propsed and experimented a method using secondary memory to manipulate very large shared BDDs (SBDDs) which cannot be stored in the main memory. Breadth-first manipulation of SBDDs is adopted in this method. We have also developed a parallel method to manipulate SBDDs on content sddressable memories (CAMs). It seems that very high parallelism can be realized using CAMs. 3.Computer Aided Logic Design Based on Boolean Processing We have applied Boolean function manipulation based on SBDDs to computer aided logic design, First, we proposed a method to generate compace test sequences for scan-based seaquential circuits. The second one is the application to the several state assignment methods for asynchronous sequential circuits. As an application for the problems not in the field of logic design, we have proposed some methods to solve combinatorial problems using Boolean processing., 05452352
1993 - 1994 - Research on Formal Verifier of Logic Design Based on Temporal Logic
YAJIMA Shuzo; HIRAISHI Hiromi; OGINO Hiroyuki; TAKENAGA Yasuhiko; HAMAGUCHI Kiyoharu
Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Developmental Scientific Research (B), KYOTO UNIVERSITY, Grant-in-Aid for Developmental Scientific Research (B), We studied the following topics on formal verifiers of logic designs based on temporal logic. (1) Formal verifier of logic designs (a) Temporal logics based on linear models are much more expressive and succinct in describing specifications. We implemented a verification algorithm based on logic function manipulation and showed its effectiveness for practical examples. (b) We developed a abstraction technique based on array structures in large logic circuits. In order to apply this technique to large examples, we needed to develop a method for verifying circuits, such as multipliers, which were intractable with known techniques. Using binary moment diagrams, we developed a new method, and showed through experiments that we can handle multipliers in polynomial time. We are dealing with incorporating the above two methods. (2) High-speed manipulation of logic functions. (a) We clarified the computational complexity of Boolean operations and minimization problems over binary decision diagrams. (b) We extended the binary decision diagrams to allow V-nodes, and showed its expressive power. We also investigated the expressive powers of various branching programs. (c) We developed a new method for handling extremely large binary decision diagrams on secondary storages. We showed its effectiveness through experiments. (3) User interface of the system We implemented a new capability on Multi-Screen Multi-Window systems to enable drawings of binary decision diagrams or logic circuits., 05558030
1993 - 1994 - 二分決定グラフの性質と並列処理アルゴリズムに関する研究
武永 康彦
日本学術振興会, 科学研究費助成事業 奨励研究(A), 京都大学, 奨励研究(A), 本研究では、論理設計支援の分野で論理関数の内部表現として広く利用されるなど、効率的な論理的関数の表現法として注目されている二分決定グラフについて、その論理関数の表現能力等理論的な立場からの研究をおこなった。 1.共有二分決定グラフの性質に関する研究 (1)変数割当とそれに対する論理関数値の組をいくつか与えたとき、それを満たす幅 k以下の二分決定グラフが存在するかという、二分決定グラフの最小推論問題がNP完全であることを示した。この結果から、二分決定グラフのPAC学習が不可能であることが導かれた。これは、不完全指定論理関数の二分決定グラフによる処理の複雑さを示したとも考えられる。 (2)閾値関数を表す二分決定グラフのサイズについて考察し、任意の閾値関数を表現するのに必要なサイズの上界及び下界を示した。変数の順序を固定した場合、適切な変数順序を選べる場合ともに指数的な下界が得られた。特に前者の場合においては上界と定数まで一致し、必要な二分決定グラフノサイズが完全に明らかにできた。 論理関数処理の計算複雑さに関する研究 以前からおこなっていた二分決定グラフの並列処理アルゴリズムに関する研究を進め、この成果をまとめた。また、機能メモリ上での二分決定グラフ処理手法について検討をおこなった。, 05780242
1993 - 1993 - 論理関数処理の並列アルゴリズムと計算複雑さに関する研究
武永 康彦
日本学術振興会, 科学研究費助成事業 奨励研究(A), 京都大学, 奨励研究(A), 04750327
1992 - 1992 - Research on Development of Logic Synthesizer and Design Verifier for Sequential Circuits Based on Boolean Function Manipulation
YAJIMA Shuzo; HIRAISHI Hiromi; OGINO Hiroyuki; TAKENAGA Yasuhiko; HAMAGUCHI Kiyoharu; TAKAGI Naofumi
Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Developmental Scientific Research (B), KYOTO UNIVERSITY, Grant-in-Aid for Developmental Scientific Research (B), We carried out Research on development of logic synthesizer and design verifier for sequential circuits based on Boolean function manipulation as follows: 1. Logic synthesizer for sequential circuits based on Boolean function manipulation For one-shot state assignment and single transition time assignment for asynchronous sequential circuits, we have proposed and implemented algorithms of finding minimum solutions based on Boolean function manipulation. 2. Design verifier for sequential circuits based on Boolean function manipulation We have proposed a design verification algorithm based on Boolean function manipulation, which assumes, as a specification language, branching time regular temporal logic (BRTL), which has higher expressive power as compared with the conventional temporal logics. We have developed a design verifier based on the algorithm and succeeded in design verification of microprocessors. 3. Efficient Boolean function manipulation We have clarified the theoretical properties of shared binary decision diagram (SBDD) to manipulate Boolean functions. We also have proposed and implemented an algorithm of finding input variable ordering such that the diagram becomes small and an algorithm to deal with SBDD of large size on secondary storage efficiently. 4. Graphic interface of logic synthesizer and design verifier We have implemented a multi-computer multi-screen system by using the X window system on workstations and achieved high resolution and high-speed drawing., 03555074
1991 - 1992 - Research on Efficient Manipulation of Boolean Functions Using Shared Binary Decision Diagrams and Its Application to Computer Aided Logic Design
YAJIMA Shuzo; OGINO Hiroyuki; TAKENAGA Yasuhiko; ISHIURA Nagisa; TAKAGI Naofumi; HIRAISHI Hiromi
Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for General Scientific Research (B), Kyoto University, Grant-in-Aid for General Scientific Research (B), We have carried out researches on efficient representation and manipulation of Boolean functions, and applied them to computer aided logic design. 1. Efficient Representation and Manipulation of Boolean Functions We have carried out researches on the efficient representation of Boolean functions using Shared Binary Decision Diagrams (SBDDs). For efficient manipulation of SBDDS, we have proposed attributed edges. We have developed a vector algorithm for manipulating SBDDs. We have also investigated variables ordering methods for minimizing SBDDs. 2. Computer Aided Logic Design Using Shared Binary Decision Diagrams We have applied Boolean function manipulation to fault diagnosis and timing verification of logic circuits. On fault diagnosis, we have developed efficient fault simulation methods for multiple faults and novel methods of generating compact test sets. On timing verification, we have developed methods for simulating logic circuits with nondeterministic delays. 3. Formal Verification of Logic Design Using Shared Binary Decision Diagrams We have proposed a method to represent state transition diagrams using SBDDs. Based on the method, we have developed a formal verification algorithm on branching time regular temporal logic, and implemented a formal verification system for sequential machines. 4. Computational Complexity of Boolean Function Manipulation We have clarified the class of functions efficiently expressed by BDDs. We have also developed a paranelization methods for manipulating BDDs and clarified the computational complexity. 5. Systems for Computer Aided Logic Design We have developed a package software so as to make it easy to manipulate SBDDs on tools for computer aided logic design., 02452162
1990 - 1991
Academic Contribution Activities
- 26th Workshop on Advances in Parallel and Distributed Computational Models (APCDM2024)
Academic society etc, Peer review, 27 May 2024 - 27 May 2025 - The Twelfth International Symposium on Computing and Networking
Academic society etc, Peer review, 26 Nov. 2024 - 29 Nov. 2024 - The Eleventh International Symposium on Computing and Networking (CANDAR2023)
Academic society etc, Peer review, Nov. 2023 - 25th Workshop on Advances in Parallel and Distributed Computational Models (APDCM2023)
Academic society etc, Peer review, May 2023 - 情報処理学会 第85回全国大会
Academic society etc, Planning etc, 02 Mar. 2023 - 04 Mar. 2023 - The 9th International Symposium on Computing and Networking (CANDAR2021)
Academic society etc, Peer review, 2021 - 23rd Workshop on Advances in Parallel and Distributed Computational Models (APDCM2021)
Academic society etc, Peer review, 2021 - 22nd Workshop on Advances in Parallel and Distributed Computational Models (APDCM2020)
Academic society etc, Peer review, 2020 - The Eighth International Symposium on Computing and Networking (CANDAR2020)
Academic society etc, Peer review, 2020 - 21st Workshop on Advances in Parallel and Distributed Computational Models (APDCM2019)
Academic society etc, Peer review, 2019 - 20th Workshop on Advances in Parallel and Distributed Computational Models (APDCM2018)
Academic society etc, Peer review, 2018 - The Sixth International Symposium on Computing and Networking (CANDAR2018)
Academic society etc, Peer review, 2018 - 19th Workshop on Advances in Parallel and Distributed Computational Models (APDCM2017)
Academic society etc, Peer review, 2017 - The Fifth International Symposium on Computing and Networking (CANDAR2017)
Academic society etc, Peer review, 2017 - 18th Workshop on Advances in Parallel and Distributed Computational Models (APDCM2016)
Academic society etc, Peer review, 2016 - 17th Workshop on Advances in Parallel and Distributed Computational Models (APDCM2015)
Academic society etc, Peer review, 2015 - 14th International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP2014)
Academic society etc, Peer review, 2014 - 16th Workshop on Advances in Parallel and Distributed Computational Models (APDCM2014)
Academic society etc, Peer review, 2014 - 11th IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA13)
Academic society etc, Peer review, 2013 - 15th Workshop on Advances in Parallel and Distributed Computational Models (APDCM2013)
Academic society etc, Peer review, 2013 - 14th Workshop on Advances in Parallel and Distributed Computational Models (APDCM2012)
Academic society etc, Peer review, 2012 - 13th Workshop on Advances in Parallel and Distributed Computational Models (APDCM2011)
Academic society etc, Peer review, 2011 - 3rd International Workshop on Parallel and Distributed Algorithms and Applications (PDAA)
Academic society etc, Peer review, 2011 - 2nd International Workshop on Parallel and Distributed Algorithms and Applications (PDAA10)
Academic society etc, Peer review, 2010 - 12th Workshop on Advances in Parallel and Distributed Computational Models (APDCM2010)
Academic society etc, Peer review, 2010 - 11th Workshop on Advances in Parallel and Distributed Computational Models (APDCM2009)
Academic society etc, Peer review, 2009 - 10th Workshop on Advances in Parallel and Distributed Computational Models (APDCM2008)
Academic society etc, Peer review, 2008 - 9th Workshop on Advances in Parallel and Distributed Computational Models (APDCM2007)
Academic society etc, Peer review, 2007 - 8th Workshop on Advances in Parallel and Distributed Computational Models (APDCM2006)
Academic society etc, Peer review, 2006 - 7th Workshop on Advances in Parallel and Distributed Computational Models (APDCM2005)
Academic society etc, Peer review, 2005 - 6th Workshop on Advances in Parallel and Distributed Computational Models (APDCM2004)
Academic society etc, Peer review, 2004 - 5th Workshop on Advances in Parallel and Distributed Computational Models (APDCM2003)
Academic society etc, Peer review, 2003 - 4th Workshop on Advances in Parallel and Distributed Computational Models (APDCM2002)
Academic society etc, Peer review, 2002 - 3rd Workshop on Advances in Parallel and Distributed Computational Models (APDCM2001)
Academic society etc, Peer review, 2001
